Commander X16

Good evening folks,
I've been researching the YM2151 chip and I have couple questions.
First, it appears this chip only has a digital output and I'm curious how the X16 is handling the digital to analog conversion.  From the docs I've read, Yamaha typically paired this with a YM3012, but I didn't know if that was how the X16 is doing it.
Second, I know one of the goals of the X16 is to use readily available parts but I'm having trouble sourcing this chip anywhere besides eBay. I'm just curious where folks are sourcing these chips.
--Luke

1 minute ago, Lorin Millsap said:

These chips are readily available through our supply channels.



This chip was an exception because firstly it met our cost goals and secondly developing an open source FPGA core if the supply dries up isn’t a problem.



Yes it is paired with the YM3012.





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On 1/14/2021 at 9:29 PM, Lorin Millsap said:

This chip was an exception because firstly it met our cost goals and secondly developing an open source FPGA core if the supply dries up isn’t a problem.

1 hour ago, m00dawg said:

Is there a plan on how the FPGA would be implemented on the final board rev? On revisions 1 and 2, the YM chips socket right onto the board, but an FPGA solution would have to piggyback on both those sockets? Has any thought been given to that and/or using a stackable daughterboard (ala VERA) and just a pin header (or even just putting it on a card)? Or will that just be a future motherboard revision down the road?

1 minute ago, Guybrush said:

I believe the idea is to use a beefier FPGA to run all (most?) of the chips... CPU, VERA, VIAs, YM, address decoding logic, the whole shebang. That would leave only RAM, ROM and perhaps some glue logic as separate physical chips.

2 hours ago, m00dawg said:

That's for the "stage 2" motherboard I thought? And stage 3 is the Pi like design (which is likely to replace as many external chips with a single FPGA as possible for size and costs). The stage 1 board, I thought, was meant to be the most expandable/moddable with as many off the shelf chips as possible. Which means, today, real YM2151 chips because they're available. My wonder was if the final revision of the stage 1 board might account for the eventuality of needing an FPGA solution and making that compatible without having to do any hacks.



There's a lot of options potentially. Including I suppose not worrying about it for Stage 1 until it becomes a problem - in which case one might be able to come up with a Ms. Pac-Man style add on card that plugs into the existing sockets directly or via ribbon cables. Given the memory map of the YM2151 it sure seems like it could also be an expansion card (though that'd eat up a slot, require more modifications to the kernel, and might be more expensive). I rather like the idea of card myself though a VERA style riser that just connects via a pin header would make things nice and tidy too.



Curiosity killed the cat I guess ? I'm sure we'll find out eventually, though hoping the team does address this in a future update/video perhaps.