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Why is the VERA Data Port selector named Address Select?

Posted: Sun Mar 17, 2024 1:49 pm
by Slevin
VERA uses the LSB of $9F25 to select the dedicated Data Port, is this correct? But in the documentation the specific selection bit0 of $9F25 is named Address Select. Wouldn't it be better to name it Data Select, since the bit will set either $9F23 Data 0 Data Register 0 or $9F24 Data 1 Data Register 1 to be processed, which both have nothing in common with the Address Bus?

At least I have spent some time trying to figure out what one could mean by naming this that way. If there weren't a more general description in the documentation below I'd never come up with the dedicated meaning of this specific bit.

Cheers, Slevin

Edit:

So after some further reading and trying to gather some information I stumbled across an interesting assumption:

Can it be, that each of the Data Ports 0 and 1 ($9F23, $9F24) has its own Address Set ($9F20, $9F21, $9F22)?
This would mean, that I first have to set the Data Port via $9F25 LSB and then have to populate the attached Address through $9F20~$9F22? I'd then end up with two independent Addresses which I can target through it's dedicated Data Port.

Please let me know if i'm correct.

Unfortunately I couldn't find that kind of explanation in the documentation, but if it's working that way, maybe I could write a small paragraph which explains that. I know, that all of you experienced developers know how the VERA, the x16 and the CC65 suite work, but since I'm very new to this topic I might see things a bit different and stumble upon issues that might be already out of your sight.

Re: Why is the VERA Data Port selector named Address Select?

Posted: Sun Mar 17, 2024 2:48 pm
by Ser Olmy
The LSB of $9F25 selects an address register, not a data port.

The VERA has two data ports, each associated with a 17 bit address register + increment/decrement bits. But as you can see from the documentation, while the VERA has dedicated memory-mapped registers for the data ports ($9F23 and $9F24 respectively), it only has one set of memory addresses for the address registers. This is solved by having bit 0 of $9F25 select which VERA address register is accessed via $9F20-$9F22.

Re: Why is the VERA Data Port selector named Address Select?

Posted: Sun Mar 17, 2024 2:53 pm
by Slevin
Thanks Ser Olmy, I've just figured that out and was updating my question ;) while you was so kind to answer.

So you confirmed my assumptions, which leads to a happy me having a beautiful sunday. However, it's still a Data Port selector, which in turn then selects the attached Address :mrgreen:

Wish you well, Slevin

Re: Why is the VERA Data Port selector named Address Select?

Posted: Sun Mar 17, 2024 2:59 pm
by Ser Olmy
The VERA relies heavily on register multiplexing. If you thought ADDRSEL was odd, you'll have a field day with DCSEL.

Re: Why is the VERA Data Port selector named Address Select?

Posted: Sun Mar 17, 2024 3:14 pm
by Slevin
Ser Olmy wrote: Sun Mar 17, 2024 2:59 pm The VERA relies heavily on register multiplexing. If you thought ADDRSEL was odd, you'll have a field day with DCSEL.
I'm prepared, I have lots of coffee and positive thinking in my backpack. However, please let me ask you just a little question here upfront:

What does DCSEL stand for? At least, what stands the DC abbreviation for'? I don't think it has to do something with comic books, but who am I to know^^.

Re: Why is the VERA Data Port selector named Address Select?

Posted: Sun Mar 17, 2024 5:09 pm
by BruceRMcF
Slevin wrote: Sun Mar 17, 2024 3:14 pm
Ser Olmy wrote: Sun Mar 17, 2024 2:59 pm The VERA relies heavily on register multiplexing. If you thought ADDRSEL was odd, you'll have a field day with DCSEL.
I'm prepared, I have lots of coffee and positive thinking in my backpack. However, please let me ask you just a little question here upfront:

What does DCSEL stand for? At least, what stands the DC abbreviation for'? I don't think it has to do something with comic books, but who am I to know^^.
Display Composer. That's the name of the collection of pipelines that build the next display row in one rowbuffer while the other rowbuffer is being used to display the current display row. When the row display process completes, the roles of the rowbuffers are swapped.

A substantial reason that ADDRSEL is not DATAPSEL (DATA Port SELect) is that access to the data ports are not multiplexed. What is multiplexed is access to the internal address registers that associated with each data port. Since the ADDRSEL does NOT select which data port is visible, but which data port address registers are visible, it literally is an ADDress Register SELect bit.

Re: Why is the VERA Data Port selector named Address Select?

Posted: Sun Mar 17, 2024 5:19 pm
by Slevin
Thanks BruceRMcF, explains a lot.

I might be getting old, but I was never that enlightened as today - so thanks for the wisdom of the day. I'll hold it grateful till the day I will forget... ;)