Commander X8 Disussion

[Mtemal]

On 10/16/2021 at 10:50 AM, BruceMcF said:

If the next step up in that FPGA family has enough Block RAM to provide the 40KB in Low RAM as well as the PCM buffer and rowbuffers, I could see an X8 style system on the X16 memory map, with 4 High RAM pages, 2 "ROM" blocks and 64K Video RAM in the 1Mbit SPRAM, without the additional BOM & build cost of an external RAM. If the Vera FPGA could support a 65C02 core, perhaps the next step up could support a 6522 VIA core to support standard User Port.



All, mind, uninformed speculation (which from the abundant amount of it available throughout the internet is surely the most fun kind to engage in!).

I’ve been looking into the Lattice FPGA’s and I think the best step is an 8K type. I think the ICE40HX8K-CB132 is probably a good candidate that will have enough room for a full X-16 FPGA. I dunno if It’s going to require an external RAM chip to handle the X16 banking. I found an introductory course on FPGA’s to familiarize my self with this tech:

http://www.ee.ic.ac.uk/pcheung/teaching/ee2_digital/

 

 

[Mtemal]

@Tatwi

There’s a post from the creator of the PE6502 who recommended the same approach:

 


 

[Wavicle]

On 10/16/2021 at 2:10 PM, Mtemal said:

I’ve been looking into the Lattice FPGA’s and I think the best step is an 8K type. I think the ICE40HX8K-CB132 is probably a good candidate that will have enough room for a full X-16 FPGA. I dunno if It’s going to require an external RAM chip to handle the X16 banking. I found an introductory course on FPGA’s to familiarize my self with this tech:



http://www.ee.ic.ac.uk/pcheung/teaching/ee2_digital/

 



 

The iCE40HX8K-CB132 is a tough sell for a couple of reasons:

1. 
   It's a BGA package which is a bit more fiddly for non-machine placed parts and cannot be soldered without a reflow oven.
   


2. 
   It requires 4 PCB layers with 3.35 mil traces to access all IOs.
   


3. 
   It lacks the 1Mb SRAM in the iCE40UP line (this is why the X8 has 64K main memory + 64K VRAM, it's using the SRAM for both)
   


4. 
   With only 128Kb of block RAM, it would require external SRAM no matter what
   

[BruceMcF]

On 10/15/2021 at 10:45 PM, Tatwi said:

Maybe Frank will find a way to give the X8 1MB of RAM, thereby making it half of an X16! ?

If you have an "X8" on an FPGA capable of accessing a separate 1MB of RAM ... why not just make it fully compatible with the X16p and have the originally described X16e (that is, the envisioned mostly FPGA, compatible with the X16p version of the X16)? After all, by that point you've pushed the price point into the $50-$100 range, so you've given up the price point that made the X8 intriguing in the first place.

 

On 10/18/2021 at 12:59 PM, Wavicle said:

The iCE40HX8K-CB132 is a tough sell for a couple of reasons:

1. 
   It's a BGA package which is a bit more fiddly for non-machine placed parts and cannot be soldered without a reflow oven.
   


2. 
   It requires 4 PCB layers with 3.35 mil traces to access all IOs.
   


3. 
   It lacks the 1Mb SRAM in the iCE40UP line (this is why the X8 has 64K main memory + 64K VRAM, it's using the SRAM for both)
   


4. 
   With only 128Kb of block RAM, it would require external SRAM no matter what
   

[3] Would seem like the killer issue ... the 1Mbit SPRAM accessed as 128KB of "Video Information" RAM seems to be how Vera can run a 50MHz dot clock for the VGA display and process as many layers and sprites as it does. Once you are adding an external SRAM, the question is, how fast will it have to be? Or will (like the Feonix256) you access multiple 8bit SRAM in parallel ... at which point the parts and build cost of that extra SRAM raises the question ...

... why not leave Vera be and program ANOTHER iCE40UP for the 65C02, OPM & I/O on the X16 memory map, with 40K Low RAM, 2 16K ShadowROM "ROM Banks", and 7 High RAM segments.

[Tatwi]

On 10/18/2021 at 3:27 PM, BruceMcF said:

If you have an "X8" on an FPGA capable of accessing a separate 1MB of RAM ... why not just make it fully compatible with the X16p and have the originally described X16e (that is, the envisioned mostly FPGA, compatible with the X16p version of the X16)? After all, by that point you've pushed the price point into the $50-$100 range, so you've given up the price point that made the X8 intriguing in the first place.

Alrighty, I think I will back out of the X8 discussion, as it's clear that I understand neither the jargon nor the details of the device. I appreciate your efforts though!

I just want to use the $50 8 bit computer David talked about nearly 3 years ago.

[BruceMcF]

On 10/18/2021 at 5:53 PM, Tatwi said:

Alrighty, I think I will back out of the X8 discussion, as it's clear that I understand neither the jargon nor the details of the device. I appreciate your efforts though!



I just want to use the $50 8 bit computer David talked about nearly 3 years ago.

Yeah, the $50 8bit computer he talked about nearly 3 years ago was multiple contradictory computers, which is how where the "X16p", "as many ASIC DIP chips as workable" version and the "X16e", "replace as many chips with an FPGA as possible" version came from. The first would be 3 figures, not two figures, the second could be two figures, but actually likely somewhere $50-$100 rather than under $50.

The X8 in the now-locked "Megathread" "stole" 64K from Vera Video to work as system RAM, and seems like it had a simpler-for-FPGA way to load Vera RAM to free up the adders that the auto-increment data port use, so that the 65C02 core could use them instead. It was a really "neat" design, but with a number of incompatibilities with the X16 at the assembly language level.

[EMwhite]

Yes.  That ‘locked in megathread’ offering was an awesome imaginary product.  (Cue the Fyre-Festival/Theranos highlights reel.

 

 

[Mtemal]

@EMwhite I’m not sure if imaginary is the right term. The prototypes exist. The PCB and FPGA files that are available should allow someone to build their own X8 if they have the parts in the BOM. I would be surprised if there isn’t someone running the “X8” on another FPGA solution considering that the Verilog files are in the FPGA folder.

[Mtemal]

On 10/18/2021 at 11:59 AM, Wavicle said:

The iCE40HX8K-CB132 is a tough sell for a couple of reasons:

1. 
   It's a BGA package which is a bit more fiddly for non-machine placed parts and cannot be soldered without a reflow oven.
   


2. 
   It requires 4 PCB layers with 3.35 mil traces to access all IOs.
   


3. 
   It lacks the 1Mb SRAM in the iCE40UP line (this is why the X8 has 64K main memory + 64K VRAM, it's using the SRAM for both)
   


4. 
   With only 128Kb of block RAM, it would require external SRAM no matter what
   

@Wavicle thank you for clarifying that. I was hoping for a clever way to use a BGA package without having to increase the complexity of the PCB layer. I think the external SRAM would be needed if the decided to try and pursue a single ICE40UP solution but with a dual ICE40UP it should be possible without an SRAM. The problem comes down to cost. Prior to the chip shortage the ICE40UP was less than $7.00 a chip, I wonder how high the markup will be when the chips slowly start being available again.

[Oldrooster]

On 10/17/2021 at 3:29 AM, EMwhite said:

Here it be[...]

no no, not that one, that was the one I got side-tracked to. The one I was searching for has little 3D printed keys, and the keys I don't think they have internal springs at all, they have tiny magnets in them, so when you press a key on the 3D printed keyboard, two magnets disconnect from each other, giving the tactile feel you are after, then when it descends there is another magnet that repels the moving part after you have lifted your finger off. That returns the key to the original position.

No it's not off topic really, the X8/16 will of course need a look and image, the keyboard is part of it, and with low volume 3D printing takes to the fore.