Getting data to/from the X16

Elektron72 · Post by **Elektron72** » Mon May 10, 2021 7:44 pm

According to the release notes in the x16-rom repo, some recent changes to the load routine (specifically, the addition of block-loading capabilities) have made it possible to load files from the SD card at 140 KB/s.

rje · Post by **rje** » Mon May 10, 2021 8:33 pm

Thank you for pointing that out... I'll look thru the pull requests for comments. 140 k/s would certainly be plenty fast.

Ed Minchau · Post by **Ed Minchau** » Mon May 10, 2021 11:05 pm

3 hours ago, Elektron72 said:

According to the release notes in the x16-rom repo, some recent changes to the load routine (specifically, the addition of block-loading capabilities) have made it possible to load files from the SD card at 140 KB/s.

Yeah, and because it loads through VERA, the load speeds directly to VRAM should be 2-3 times faster; I've been estimating 300kb/s.

Elektron72 · Post by **Elektron72** » Mon May 10, 2021 11:58 pm

48 minutes ago, Ed Minchau said:

Yeah, and because it loads through VERA, the load speeds directly to VRAM should be 2-3 times faster; I've been estimating 300kb/s.

Could you explain why loading to VRAM would be faster? As far as I understand, the data would still need to pass through the CPU before being transferred to VRAM.

Ed Minchau · Post by **Ed Minchau** » Tue May 11, 2021 12:43 am

1 hour ago, Elektron72 said:

Could you explain why loading to VRAM would be faster? As far as I understand, the data would still need to pass through the CPU before being transferred to VRAM.

It's the other way around. The SD card goes to an IEC2SD implemented on VERA, which then has to push it through the CPU to RAM. Just loading directly to VRAM skips about eleven 8MHz cpu cycles per byte that would be required to push it to RAM and increment the RAM address, and VERA operates at 25MHz and can autoincrement. A 300kbps estimate is conservative, about eighty 25MHz cycles per byte.

Elektron72 · Post by **Elektron72** » Tue May 11, 2021 1:47 am

48 minutes ago, Ed Minchau said:

It's the other way around. The SD card goes to an IEC2SD implemented on VERA, which then has to push it through the CPU to RAM. Just loading directly to VRAM skips about eleven 8MHz cpu cycles per byte that would be required to push it to RAM and increment the RAM address, and VERA operates at 25MHz and can autoincrement. A 300kbps estimate is conservative, about eighty 25MHz cycles per byte.

While both VRAM and the SPI port are on VERA, the VERA documentation does not describe a mechanism by which a direct transfer between the SD card and VRAM could be performed. Looking at the kernal load routine (in kernal/cbm/channel/load.s), loading to VRAM involves the CPU manually loading bytes into VERA's DATA0 port. This doesn't use the block-loading API, so loading to VRAM will likely be slower than loading to RAM.

BruceMcF · Post by **BruceMcF** » Tue May 11, 2021 1:29 pm

12 hours ago, Ed Minchau said:

It's the other way around. The SD card goes to an IEC2SD implemented on VERA, which then has to push it through the CPU to RAM.

Last time I read the Vera doc, it appeared to just be an SPI port with a 12.5MHz serial clock normally, fitting within the regular maximum 20MHz serial clock for accessing the SD card in SPI mode, and a slower serial clock for the phase of starting an SD card into SPI mode that is specified at a lower top speed limit.

It's not clear why it would be necessary to implement an IEC2SD on Vera when the byte to/from the SPI is directly addressed in the memory mapped I/O space, and the 65c02 is perfectly capable of doing SPI mode SD card operations, but in any event, I don't recall any mention of the coprocessor on Vera that would be required to go that route.

Ed Minchau · Post by **Ed Minchau** » Tue May 11, 2021 4:42 pm

14 hours ago, Elektron72 said:

While both VRAM and the SPI port are on VERA, the VERA documentation does not describe a mechanism by which a direct transfer between the SD card and VRAM could be performed. Looking at the kernal load routine (in kernal/cbm/channel/load.s), loading to VRAM involves the CPU manually loading bytes into VERA's DATA0 port. This doesn't use the block-loading API, so loading to VRAM will likely be slower than loading to RAM.

That's definitely not what the emulator is doing. Data loaded directly to VRAM doesn't touch the CPU at all.

SlithyMatt · Post by **SlithyMatt** » Tue May 11, 2021 4:57 pm

14 minutes ago, Ed Minchau said:

That's definitely not what the emulator is doing. Data loaded directly to VRAM doesn't touch the CPU at all.

Is that the case when using an SD card image, or just when using the host file system?

Elektron72 · Post by **Elektron72** » Tue May 11, 2021 5:49 pm

40 minutes ago, SlithyMatt said:

Is that the case when using an SD card image, or just when using the host file system?

I usually use the emulator with an SD card image so I can access features that are not supported when using the host filesystem. I have used the debugger to step through the routine that handles loading to VRAM, and can confirm that when an SD card image is used, the CPU has to process each byte. On the other hand, loading to VRAM (or anywhere else) does not involve the CPU when the host filesystem is used, as the emulator itself handles calls to the load routine.