First of all, I didn't know that voidstar was part of this! Assuming this is Zack Freedman of Voidstar Labs, I'm a huge fan!
With that out of the way, I'll give my full perspective on this:
I thought the original pitch of trying to make an education-focused platform that captured the good parts of the retro experience while minimizing the negatives, was a strong concept.
At some point, the project pivoted to catering to midle-aged nostalgia-junkies who want to relive the "glory days" and don't mind spending $500 to do so. I don't find that very nearly as compelling.
Even the MiSTER project, in my eyes; is more compelling. It allows us to, in a sense, preserve the history of video game design as an art form.
Years ago, I saw this project as an oportunity not only to introduce people to programming in a unique way, but also to put a cheap FPGA in the hands of lots of learners. They are amazing learning tools. I suggested that it's well within the realm of possibility to fit a system quite a bit more powerful than a C64 into a single Lattice Ice40 UP5K, which at the time cost ~$5 (now it's $8-9). This pitch was met with pretty extreme hostility, so I didn't stick arround.
I think the restrictiveness of 64 kB of RAM is pretty esscential to the retro learning experience. It's like
a fun puzzle you have to solve. It provides the incentive to write assembly. Every additional byte has diminishing returns which quickly become negative. Trying to squeeze the entire system into the cheapest FPGA possible seems naturally in keeping with that ethos.
It sounds like Phase 3 of the project is actually going in that direction, so that's what I'm interested in.
I think I could be an asset to the community. I have a Bachelor's in Electrical Engineering (with a focus on HDL) as well as 15 years of programming experience.
My musings about RISC-V were for a future design (hence the title). They were never meant as a replacement for the current hardware.