23 minutes ago, m00dawg said:
All good points. Kliepatsch, curious, how do you think the VERA compares to, say, a real NES (if you're heard one)? The NES DCPM _definitely_ has some aliasing on the DPCM. I found the squarewaves to be pretty decent though ironically the triangle of the NES is where I tend to hear tons of aliasing (I think this makes sense given how the NES generated the triangle compared to how the Vera does).
I can't say too much about it. I have listened to a few chiptune pieces made with the NES on YouTube, also displaying the waveforms. And I have also noticed the "aliasing" of the triangle waves. I think, technically, it's not aliasing. It's bit reduction. The NES triangle waveform looks like a stairstep pattern on the oscilloscope views. This seems to be more noticeable when the triangle plays at low frequencies, when the stairstep pattern (which is similar to another triangle wave on top of the actual one) shifts into the audible frequency range... The fact that it's just a low bit depth and not aliasing has the result that the unwanted overtones at least are multiples of the base frequency, so they don't get on one's nerves as easily ... sorry, that is probably a bit too technical for this thread
? Anyway, I would also like to comment on the CPU usage by the VERA. I was estimating the CPU usage that the
Concerto sound engine would be using at its current update rate, which is fairly high (the update rate). I was always considering the worst case, when there were 16 individual voices, each playing 3 envelopes, 1 LFO and, what in fact uses the most CPU (!): the modulation routing. And an 8 MHz 65C02 will handle that, and even leave a bit of headroom. As
@m00dawg pointed out, most of the time you won't be using all those modulation stuff at the same time. That's why I am not too worried about CPU usage (yet!
? more complexity to come!).
The part that takes up the most CPU in Concerto is the modulation routing, because modulation sources (such as envelopes) are multiplied with the modulation depth in each tick for each routing. The less of these routings are assigned, the less CPU power is used. This multiplication could be avoided altogether with a different modulation architecture ... possibly removing some of the flexibility, but going at a much lower CPU usage.