Commander X16

46 minutes ago, The 8-Bit Guy said:

stage 3, which is all inside a single FPGA.  We have a prototype of that which runs at 14 mhz and seems stable

2 hours ago, The 8-Bit Guy said:

Indeed.  The 8 Mhz limitation is due to various components on the board such as ROM, the sound chip, the Vera, etc.   In fact, we only have it working stable at 4 Mhz at the moment on the latest rev of the proto-board.  But, with a few minor changes we still fully expect to get it back up to 8 Mhz and stable.  



Having said that, stage 2 and stage 3 do present the possibility to go faster.  Specifically stage 3, which is all inside a single FPGA.  We have a prototype of that which runs at 14 mhz and seems stable.  But, as far as the DIP style board, which serves as the basis for the whole computer architecture, 8 Mhz will likely be all you will ever see.

4 hours ago, The 8-Bit Guy said:

Indeed.  The 8 Mhz limitation is due to various components on the board such as ROM, the sound chip, the Vera, etc.   In fact, we only have it working stable at 4 Mhz at the moment on the latest rev of the proto-board.  But, with a few minor changes we still fully expect to get it back up to 8 Mhz and stable.  



Having said that, stage 2 and stage 3 do present the possibility to go faster.  Specifically stage 3, which is all inside a single FPGA.  We have a prototype of that which runs at 14 mhz and seems stable.  But, as far as the DIP style board, which serves as the basis for the whole computer architecture, 8 Mhz will likely be all you will ever see.

5 hours ago, TomXP411 said:

I should mention that Gideon has managed to get the Ultimate 64 running at 48MHz. So it's definitely possible to run the 6502 at that speed; although I'm not sure precisely how he manages the CIAs and other forms of I/O, though.



If the U64 only had an 80-column output....



 

1 hour ago, Cunnah said:

Not had much input into these things but it seems that at the very least the phase 2 and 3 versions should have the same speed (if not all of them). If you don't you end up with the issue that the original systems had which is that when making software you will always end up aiming for the lowest common denominator. Even worst if someone writes software that is CPU speed dependent (I guess you would need a Turbo button :))

2 hours ago, BruceMcF said:

The present prototype board is wired to be selectable between 2, 4 and 8MHz ... that's what the reference to only booting it up stable at 4MHz at the present is. So, eg, a jumper to select between 8MHz and 12MHz in phase 3 (CX16"e") shouldn't not be TOO difficult.



 

15 hours ago, Cunnah said:

That makes sense (and I recall that being the case from the previous videos) I guess it needs to be locked down for the later revisions if the intention is to avoid devices competing with each other and a split software base (or more likely an unused potential)