Change of product direction, good and bad news!

[Scott Robison]

On 10/13/2021 at 3:02 AM, Calculon said:

When the conversation about the final release plans of a modern retro computer has turned to what technically constitutes a “computer” and a “program”, the plot has truly been lost. Something tells me that Murray and company learned all they needed quite some time ago.

I wish that was the worst of it.

[BruceMcF]

On 10/12/2021 at 10:50 PM, Oldrooster said:

Totally is.



Of course, there is no defined set limit as to what is a computer, so people interpret it according to their own desires, same way the USA declared space to be a lot closer to the reach of their weak and slow rockets after the USSR launched mankind into orbit on Vostok 1.



A computer does not need to be electronic, I would say that is a universally accepted point, and a computer can and often is a person.

It is clear from the context which sense of the word "computer" is being used, so discovering that one word can have multiple meanings doesn't advance the position that FPGA's and emulation are fundamentally equivalent ... neither does suggesting that an operating system is not, in fact, executing instructions when a user program makes a system call simply because the author of the user program did not think about what instructions would be executed when the system call was made.

Indeed, an FPGA that loads its connection set-up at power up can be "hacked" in the sense that if someone can get to the board to load something new into the serial flashROM, they can change the way that it behaves ... but if someone with a desolder, solder and a soldering gun gets at a soldered board, then that board can be hacked in the same sense. But in either case, the Ozzie police need physical access to the board to do so (setting aside just what the use case is for the Ozzie police wanting to hack an X8 board).

[paulscottrobson]

On 10/12/2021 at 12:40 AM, BruceMcF said:

How much does an FPGA with 512KB of block ram go for?

Lots. Whilst Block RAM is probably mandatory for VRAM, given that it's clocked at 8Mhz I would wonder if it would be better to use an external RAM chip.

[paulscottrobson]

On 10/13/2021 at 10:02 AM, Calculon said:

When the conversation about the final release plans of a modern retro computer has turned to what technically constitutes a “computer” and a “program”, the plot has truly been lost. Something tells me that Murray and company learned all they needed quite some time ago.

I would imagine they would have had a look at this to get views and ideas on the various platforms and possibilities, but I doubt we can significantly affect anything. Probably the most useful post is Bruce McF's ideas about having a serial extension if they do go round the X8 route.

[BruceMcF]

On 10/13/2021 at 1:22 PM, paulscottrobson said:

Lots. Whilst Block RAM is probably mandatory for VRAM, given that it's clocked at 8Mhz I would wonder if it would be better to use an external RAM chip.

Vera doesn't rely on the Block RAM for the "Vera Video RAM" space, it uses an internal 1MBit SPRAM module, accessed as 128KB, and it is indeed vital for the functioning of Vera for it to access it faster than 8MHz. I guess it might use Block RAM for the FIFO buffer for the PCM.

And, yeah, I expect that for the 512KB High RAM, an FPGA with enough I/O pins to access a 512KB SRAM might be less expensive, but it seems like it would be pricier than the FPGA they use for Vera.

[Oldrooster]

On 10/14/2021 at 10:22 AM, BruceMcF said:

I expect that for the 512KB High RAM, an FPGA with enough I/O pins to access a 512KB SRAM might be less expensive, but it seems like it would be pricier than the FPGA they use for Vera

I was looking for FPGAs on fleabay and the bare minimum systems and development boards available and they are in the $30-40 range and up of course, which made me feel that the project I'm working on compares favorably to the X16, I had been worried today doing pricing for the BOM, which so far is about $23 - 30 for the keyboard and $20 for the CPU board. That excludes the SVGA/XVGA video board, which I was estimating to be perhaps $30-50 by itself. I think the video is going to take the most money on parts but I shudder to think what the X-16 will cost with it's own FPGA given the minimum cost of FPGA would buy a lot of silicon real estate in generic components. I think both projects blow the $50 budget, but the one i'm working on does it by a much smaller margin and takes up the slack by allowing things like adding 512k extra SRAM/VRAM to be a trivial pursuit on an open board and accessible design.

I am still convinced that one or more of the video solutions in development would beat out the FPGA version on both feel and price, but I do indeed enjoy expanding my vocabulary as I learn more about the X16 FPGA implementation. I did have to look up one or two things, and so I shall save readers the bother with links for readers to pulse code modulation (PCM), block ram (BRAM) & FIFO BRAM, single-ported RAM (SPRAM) as opposed to the regular and expensive Dual port VRam which can be used this way but is more commonly referred to by hobbyists in the capacity of video memory, (VRAM) where the programmer can write into the video ram anytime and the display card can read out the pixels at the exact moment required to write them on screen without causing conflicts.

Dual port ram is tricky to come up with in discreet components, but there are solutions to address it's purpose even though they are not pure dual port solutions.

 

[EMwhite]

I hear (have 'seen' vs. read and understood) so much about VERA and about what it is or isn't.

My fundamental question is... "is it?"  In other words, does it exist in finished form and can it be acquired for use in other projects or was it in the midst of being developed, somehow forked to support this project and was then stricken by malaise, scarcity of supply, or some other problems?  I think I remember reading that somebody thought putting it into a cartridge for a C64 was attractive but also that moving data to/from it over a SCI* interface was a nonstarter (too slow).

EdIt: As Bruce McF pointed out, it's "SPI"; SCI is the Scalable Coherent Interconnect that I spent a lot of time with in the 90s.  it was Sun Microsystems passive, copper based 25 Mbps interface that we leveraged for Oracle Parallel Server (OPS) which was used for their shared global area (SGA) on top of Sun Cluster.  If only those skills were still useful today!  Too many TLAs.

[BruceMcF]

On 10/14/2021 at 2:29 AM, Oldrooster said:

Dual port ram is tricky to come up with in discreet components, but there are solutions to address it's purpose even though they are not pure dual port solutions.

I don't know the details of the Vera implementation ... not only is the circuitry specification not public, but even if I had it, I would probably have to study up quite a bit in order to understand everything going on ... but one can speculate that with the dataport is driven by an 8MHz clock and Vera running an internal 50MHz clock, that Vera might access the SPRAM 3 cycles out of every four, and the fourth is when the SPRAM can accessed by the dataport.

It also seems likely that it works with a rotating pair of rowbuffers, like the Gameduino ... one being used by the pipeline that generates the upcoming scanline bottom layer, intervening sprites, top layer, and any sprites on top, while the other one is being used to generate the current scanline ... and those would be in Block RAM as well, given that so much of data accessed by the video generation pipeline originates in the SPRAM.

But while I am less than a beginner in terms of using FPGAs, I have seen the FPGA used for Vera quoted at under $7 Q1 at Mouser, and I have seen other FPGA with far more pins at over $20 Q1, so I am always a bit skeptical about confident assurances that "so and so" can "easily" by done when the "ease" may well involve simply throwing three times as much money at the problem.

[Scott Robison]

On 10/14/2021 at 8:47 AM, BruceMcF said:

But while I am less than a beginner in terms of using FPGAs, I have seen the FPGA used for Vera quoted at under $7 Q1 at Mouser, and I have seen other FPGA with far more pins at over $20 Q1, so I am always a bit skeptical about confident assurances that "so and so" can "easily" by done when the "ease" may well involve simply throwing three times as much money at the problem.

Indeed. The proof is in the pudding. If it's easy, go do it and show us the better more enlightened way. I know it is hard for some people to find time to do such things when writing, derailing thread topics, and fighting to keep foreign governments from making us appear foolish take so much otherwise productive time...

It seems it would be a great investment for the world if one could take the Ben Eater world's worst video card and turn it into something comparable to VERA.

[EMwhite]

Replying to @Scott Robison ... Prob only 5% of the fanbase here will be interested but if you look at Day 1 of VCF east (YouTube link), you'll see just that...  Ben Eater's worlds worst video card implemented in FPGA by Stefany of C256 Foenix.  The hour went by quickly but if you start with the basic of what Ben did in hardware and know what an FPGA is and is not, you can see her walk via verilog, and provide a start into what is required in order to make this wonderful fungible hardware behave in any way one desires.

She gets nowhere near what she did with VICKY II (sprites, tiles, various video modes, Gideon SID, and everything else) but it's still interesting.  Probably could have used an 8 hour workshop or a week of training/hands on.  But in the absence of nothing, it was something.