New demo uploaded: PSG Audio Test or Why We Only Need Vera.

[AndyMt]

3 minutes ago, Yazwho said:

No idea if the emulator handles it correctly.

Yes, that might be the issue then. Oh well. All the more important to get actual hardware.

[ZeroByte]

 

2 hours ago, AndyMt said:

Wait! Im confused - because I don't do this in my games and music works nevertheless. I write as fast as possible to the YM until there is a KEY_ON command - or I have to yield because of a delay. This then is synced with the vsync interrupt. So yes, for sure there is more than 144 CPU cycles between each KEY_ON command, but not between each write. 

The busy delay is incurred after each and every write to the YM data port, not just KeyON/OFF.

I worked with @StephenHorn on the box16 emulator project while he was refactoring that emulator to use the new BSD-licensed YMFM core library. I've learned quite a bit about how this chip works.

R38 has several inaccuracies in the YM implementation - the core it uses does not emulate the busy behavior at all. You can bang away on it all day long and it won't skip a beat. The library just handles it. Furthermore, I don't think the IRQ functionality is emulated, and I also think the timer behavior might not be implemented either - I'll go re-test this and let y'all know...

Box16 has extended the YM support in several ways - it supports YM IRQs as well as busy flag behavior. Some of this has been a matter of the group's interpretation of other example code and/or the official YM2151 application manual. In other words, the current behavior in Box16 is our best guess as to the real behavior. Stephen has done an excellent job integrating this code and dealing with a colossal time synchronization nightmare, by the way. Kudos to his hard work! One of his decisions was to make these "enhancements" be disabled by default to maintain functional parity with the official emulator. They are activated by command-line arguments. Interestingly, when testing the accuracy improvements, one of my VGM playback routines went nuts and played an entire song back in less than 1.5 seconds. It turns out that the original VGM data stream contains commands that enable YM IRQs. My player just used WAI as a poor man's IRQ handler to wait for VSYNC. Thus it mistook these YM IRQs as VBLANK IRQs. The player was built to read the busy flag though, and even with strict enforcement of the busy state, the player doesn't drop any updates, so that seems to work properly. After removing the IRQ enable messages from the VGM, it plays back perfectly on Box16 even when it enforces busy flags.

 

Real Hardware?

The big question is how will this work on the real thing? As I said above, the behavior is currently our best guess based on other sources, none of which being real hardware.

One thing I can say is that @SlithyMatt's Chase Vault game works on real HW, and the game's YM routine uses busy flag reads to ensure that it does not write to the chip when it's busy - so that's a good sign. Beyond that, I've sent a basic read test program to Kevin, as the YM reading functionality has never been subjected to testing on X16 hardware the way writing has been. So far, the "hello world" results are interesting. Kevin's only been able to test at 2 and 4MHz which the math says should work just fine on YM. 8MHz is the really important one, but as the system is currently experiencing other 8MHz-related problems, Kevin wasn't able to test at 8MHz.

In short - the test program successfully read IRQ status flags w/o any errors at 2 and 4 MHz. Interestingly, the busy flag read test never observed the flag's having been set, but I think there might've been a bug in my code.

I'm personally convinced that the write delay specification is actually a little bit different in reality than you might expect from reading the application manual. That is, I strongly suspect that the "64 YM clock delay" is not a minimum but a maximum. The data sheet definitely has other errata, and I'm convinced this is just another example.

I have a real YM to test with, but don't have everything lined up enough to be able to put it on a breadboard and do real testing just yet. If I can get that done, I'm definitely going to poke around with the real chip's busy state flag to see what makes it tick.

YM and write performance / overhead:

As for writing performance with the YM, I'd like to point out that in my experience with generating byte streams of PCM writes and FM writes, the FM music data streams are much smaller than the PSG streams. This is completely to be expected. That's because the FM chip does so much of the modulation in hardware that you don't need to update it nearly as often to get decent-sounding music. PSGs must be constantly modified for every little thing, be it pulse width modulation, vibrato, etc - all of which is done in hardware on the FM chips. Consequently, you end up performing SIGNIFICANTLY fewer writes to an FM chip than you do a PSG over the course of a tune. Still, sitting around for ~144 clock cycles waiting on the chip to finish chewing the last bite is not ideal.

I believe one way to handle YM writes may be to queue up the writes into a ring buffer, and have an IRQ that empties the ring buffer. You can set the YM's timers to run a little slower than the actual rate the YM could drain the buffer in order to cut down on the IRQ overhead. This would have the effect of spreading the load evenly throughout a frame if that's what you'd like to do. Kevin has confirmed that the YM2151's IRQ line is indeed connected to the system, so this should be doable on the real system.

[Snickers11001001]

7 hours ago, Yazwho said:

I'm not sure what you mean. Where would any contention come from? 

I've been going through Matt's videos.   I am _not_ an assembly guru or even passably good at it, so forgive me if I'm all wet. 

But there's 2 data ports on the VERA (well, at least X16 VERA, the X8 is a whole different ball of wax apparently).   You have to set things up to point to the VERA address and port you want and the stride.   The VERA memory range includes (a) the video memory; (b) the PSG registers; and (c) the sprite registers.  (also palette).    Three different activities in the structure of a game code and only two ports into that space, which require set-up to read/write.   That's all I meant and is the sort of contention I had in mind when I wrote that.  

It seemed to me that if you've got a routine using VERA data ports 0 and 1 to move some video data in preparation for a scroll or context change, or to work the VERA sprite registers; then if an interrupt for music fires, the music routine must include code to save the what data port was selected, the VERA address the data port had been pointing at as well as the stride value, and then restore all this before exiting back to regular execution.  Otherwise when the program flow gets back to what was happening before the audio code, the data port/stride stuff will have wrong values.    

Seems to me you'd have to store/restore:  $9F20, $9F21, $9F22, and $9F25 at least.   Looks like those cover the L,M,H portions of the VERA address, the inc/dec stuff, and the port select bit.   So to store that's 4 LDA absolutes at 4 cycles each, plus 4 STAs at 4 cycles each (3 each if you have 4 ZP addresses you can set aside to be temp storage for these or I guess you could push them on the stack if you're sure it will have room), and the same when your music handler is ready to exit, the reverse to put everything back.   Reading through this now, I realize I'm stuck in the 'long ago' and thinking at C64 cpu speeds and the old 'cycles per refresh' thing, but those cycles are probably of negligible impact with the 8mhz clock on the X16.

Still, until I heard the extra timing considerations on the YM chip in this thread, I had thought it might be easier to just have a music routine that needn't concern itself with saving/restoring VERA state info and just play the dang music.   Obviously very naïve thinking,  as it turns out.   

I meant no offense at all at what you're doing, and I thought I made it clear that I love this demo.   I hope my ramblings weren't taken as any sort of criticism.  

Cheers.   

 

[Yazwho]

2 minutes ago, Snickers11001001 said:

hen if an interrupt for music fires

For my player, it's not triggered from its own interrupt. You call the audio routine once per frame, that's it. It's up to the callee to save anything that is needed, but as you control it you'd try to time it so you didn't need to.

 

5 minutes ago, Snickers11001001 said:

I hope my ramblings weren't taken as any sort of criticism.  

Not at all ?

[AndyMt]

On 9/9/2021 at 5:21 PM, ZeroByte said:

I worked with @StephenHorn on the box16 emulator project while he was refactoring that emulator to use the new BSD-licensed YMFM core library. I've learned quite a bit about how this chip works.

I tried to get box16 to run, but have failed to compile my own compatible rom.bin (don't get the toolchain to work on Windows, despite the instructions being pretty clear).  I then used a rom.bin from an older R39 release I had lying around, but of course this doesn't work, too. Any ideas?

[ZeroByte]

Stand up a Linux VM in Virtual box? Or build it on a RPi?

If you have trouble, Ill PM one to ya.