Commander X16

Well, Box16 doesn't support importing the symbol tables from llvm-mos yet. But I would totally accept a PR incorporating it, and if nobody is otherwise interested then there's still a non-zero chance I'll do it myself, based on the work in your fork. Assuming you're okay with that.

That. Is. Amazing.

Ultimately several design choices have crippled some novel implementations of expansion and you have to do everything the slow way without any form of modern acceleration. I'm curious what you're trying to design for the X16. Mostly because I've looked at the idea of a basic memory-copying/memory s...

Why are the ISR vectors in ROM only to point to RAM locations? They need to be in ROM, or else the system might not boot correctly from a power-on. The 65xx series of processors look at fixed addresses for several events, including the address of a interrupt routine, and these vector locations are ...

It is up to the machine-language program whether or not it will respond to Ctrl-C or the Run/Stop key, and even if it normally handles those keys then it may still fail to return to the BASIC environment if the program becomes unresponsive. This is because machine language programs can do literally ...

Actually, as I was writing some documentation, I came to realize that my implementation wasn't all that fast... it could be faster! So I'm going to keep working on it. In the meanwhile, the main thing is that this is designed to be used almost entirely through its macro set, which is creating a dist...

After going on for quite some length in the C linked-list thread , I became interested in just how easily a human could potentially implement a faster linked list than what CC65 can be coaxed into generating. Because cc65 seems to ultimately want to perform 16-bit arithmetic at the slightest provoca...

Another thing I've been meaning to ask: Does a line interrupt trigger at the beginning or end of the line in question? When the line starts or when it hits the horizontal blank? The emulator is setting the bit in VERA ISR at the start of the visible line. That said, there are several possible place...

It's unfortunate we had the wrong behavior in the emulator for as long as we did, and only fixed it in January 2023. I'm fairly certain the line IRQ portion of the bit handling bug dates back all the way to when line IRQs were implemented, but I'd have to do some fairly involved code archeology to d...

I dimly recall there being some PRs having to do with VERA IRQ triggering and line IRQs... ah, yeah, found the change that matters in the emulation code. In January this year (2023 for time travelers from the future), a change went in to match emulation behavior with hardware behavior. On VERA hardw...